A prototype three-port CMOS circulator reached more than 40 decibels of isolation at a tuned operating point in microwave measurements, according to a new preprint. The peak came at a carrier frequency of 5.8 GHz and a modulation period of 1.8 nanoseconds, about 26 dB above the approximately 14-dB natural-switch baseline.
The test also changed the direction of circulation, known as chirality, in 0.6 ns after the second and third control clocks were swapped at time zero. The reversal occurred within a single modulation period, and 40-dB isolation held on both sides of the change. The measured peak was limited by the noise floor.
A second leak can cancel the first
At issue is whether Floquet interference, the interaction of frequency components created by periodic switching, can overcome the isolation ceiling imposed by non-ideal semiconductor switches. The analyzed circuit is a three-port, time-Floquet switched-resonator network controlled by three cyclically shifted clocks. It defines isolation by comparing the carrier-frequency signal at transmitted port 2 with the signal at isolated port 3.
The proposed mechanism has two unwanted signals. One is release leakage from a resonator, and the other is charge leakage through a switch during its off state. The model tracks the release contribution at the resonator's ring-down frequency and the charge contribution at the carrier frequency. It reports cancellation when the two have equal amplitude and opposite phase. The capacitive crossing contributes a phase of about a quarter cycle.
The model identifies a unique equal-amplitude crossing on the destructive-interference line. At that point, the release leakage is falling while the charge leakage is rising, and the two meet in anti-phase. Tuning the modulation period to this crossing was the basis for selecting the operating point used in the prototype measurement.
Why ordinary switches hit a ceiling
The practical model includes the switch's finite off-state capacitance and the charge-leakage path present when the switch is meant to block the signal. The study gives a circuit estimate in which the natural isolation ceiling depends on the switch cutoff frequency, on-resistance, carrier frequency, source or port impedance and a window factor comparing useful release with direct charge leakage. The estimate tightens as carrier frequency rises.
In simulations, an ideal switch with no off-state capacitance kept gaining isolation as normalized switching-window duration increased. The practical integrated-switch model, with a cutoff frequency of 1.23 THz near a ring-down frequency of 6.57 GHz, instead levelled off just below 10 dB. At the reported cancellation point, simulated isolation exceeded 40 dB, approximately 30 dB above the approximately 10-dB practical-switch ceiling.
The numerical analysis used a linear time-varying state-space circuit model, trapezoidal implicit Crank-Nicolson integration and Floquet-harmonic projection after transients over 50 modulation periods. The simulation compared ideal and finite-off-capacitance switches with the natural-switch baseline.
The hardware check
The experimental chip used 65-nm CMOS and integrated three switched resonators. Its measured ring-down frequency was 5.37 GHz. Three packaged prototypes were measured; all reproduced the interference line and isolation peak, although the displayed data came from one representative device.
For the frequency sweeps, a vector network analyzer was connected to the circulator's three ports. For the reversal measurement, the setup captured transmitted port-2 and port-3 signals simultaneously while an arbitrary waveform generator produced the reversing clock sequence.
The displayed result is from one representative device, while the three-prototype measurement reproduced the interference line and peak; device-level variability was not quantified. The operating point was tuned to 5.8 GHz and 1.8 ns, and the noise-floor limit leaves the exact isolation depth beyond 40 dB unresolved.
What remains to be tested
The evidence is analytical, simulated and hardware-based. The supplied analysis leaves open how the cancellation changes with technology node, packaging condition, temperature and device variation, and whether the approach extends to higher carrier frequencies and other integrated resonator designs.
The supplied analysis does not report insertion loss, power handling, thermal behaviour or long-term stability. The demonstration is therefore a tuned laboratory result, with its exact null depth still limited by the measurement noise floor.
Publication and disclosures
The work is an arXiv preprint, version 1, dated 28 August 2026. Supporting data are presented within the article, while code used to evaluate the conclusions is available from the corresponding authors upon request.
Reported support includes Swiss National Science Foundation Eccellenza grant 181232, Swiss State Secretariat for Education, Research and Innovation contract MB22.00028, Huawei Technology Sweden, the SwissChips initiative and a Swiss National Science Foundation fellowship. The authors declare no competing interests.
Paper data and sources
Original title: Beating the nonreciprocal isolation limit of integrated circulators by Floquet leakage interference
Authors: Zhe Zhang, Haoye Qin, Junda Wang et al.
Journal/Repository: arXiv
Status: Preprint, not yet peer-reviewed
First online: 2026-08-28
DOI: Not available
Original paper · Full text