A preprint reports a sharp difference between two simulated Ising-machine setups: runs using the proposed Langevin-dynamics hardware annealing reached the best-known solution (BKS) in 86.5% of cases, compared with 17.5% without hardware annealing. The average distance from the BKS was 0.28 with the proposed algorithm and 11.4 in the comparison. The paper reports the reach probability as nearly five times higher and the solution-quality change as a 97.5% improvement.
The paper evaluates the performance of a Langevin-dynamics hardware-annealing algorithm for Ising machines through chip-level simulation. MAX-CUT problems provide the benchmark, and the chip-level model is a 50-spin design in commercial 65nm CMOS technology.
How the annealing search works
The method injects a random noise current along the circuit’s current-summation path to perturb individual spins. The authors characterize the simulations as indicating assistance in escaping local minima.
The schedule starts with kappa greater than 1, gradually decreases kappa during annealing and then stops injecting noise so the system can reach equilibrium.
The smaller circuit model
For the chip-level test, researchers modelled a 50-spin Ising machine in commercial 65nm CMOS technology. They mapped 10 randomly generated all-to-all binary-weight MAX-CUT problems onto it, ran each problem 50 times from different initial spin configurations and fixed each simulation at 100 nanoseconds.
The two main measures were the probability of reaching the BKS and the average distance from it. A higher reach probability and a lower distance counted as the better result.
Against the no-annealing setup, the simulations recorded BKS reach in 86.5% of runs with the proposed method, versus 17.5% without hardware annealing. Average BKS distance was 0.28 with the proposed method and 11.4 without it. These figures are the reported outcomes of the repeated simulations.
A larger behavioral test
The paper then used a 2000-spin behavioral BRIM model, comparing Langevin dynamics (LD) with spin-flip annealing (SF) on G-set MAX-CUT problems using the same BRIM substrate. The comparison covered 30 problems, used a 2.2-microsecond annealing time and took each reported solution as the best of 50 runs.
Average distance from the BKS was 1.8 for LD and 2.6 for SF. In the reported comparison across 500 runs and 30 problems, LD was reported to reduce time-to-solution by 50% while attaining the same solution quality.
That timing result carries a qualification. The behavioral simulation omitted time spent updating spins during SF annealing, and the paper says this may make SF’s total time look lower than it would in a complete end-to-end comparison.
What the simulations leave open
Robustness was tested in behavioral simulations by changing the injected noise-current magnitude by 3%, 5%, 10% and 20% for two G-set instances, G022 and G039. The authors describe the annealing as robust to this PVT variation, making this a qualitative result in the supplied account.
The authors characterize the simulations as indicating assistance in escaping local minima, short time-to-solution and potential enhancement of Ising-machine performance. The evidence described covers circuit-level and behavioral simulations of BRIM Ising machines on MAX-CUT and G-set instances.
Those results leave open whether the reported differences would hold on fabricated hardware or under measured device behaviour. They also leave open whether the findings extend beyond the tested benchmark instances or to larger systems. The supplied analysis reports no confidence intervals or other uncertainty estimates, so it does not quantify how much the results might vary across the reported runs.
Funding is not reported in the supplied text. The metadata classifies the work as a preprint, and the front matter names the authors’ University of Rochester affiliation.
Paper data and sources
Original title: Integrated Hardware Annealing based on Langevin Dynamics for Ising Machines
Authors: Yongchao Liu, Lianlong Sun, Michael Huang, Hui Wu
Journal/Repository: arXiv
Status: Preprint, not yet peer-reviewed
First online: 2026-08-26
DOI: Not available
Original paper · Full text