An industrial GaN transistor showed compression in the material between its gate and drain when it was off, while stretching appeared near the gate edge as it turned on. The study used stroboscopic dark-field X-ray microscopy to follow the complete switching cycle and compare measured strain with coupled simulations.
In each of four parallel regions, compressive strain was about −2 × 10⁻⁴ in the off-state, while tensile strain reached about +1.5 × 10⁻⁴ near the gate edge during turn-on.
Seeing strain as the device switches
DFXM measured out-of-plane lattice strain integrated through the GaN:uid and GaN:C sublayers. Synchronized X-ray pulses about 40 picoseconds long produced a three-dimensional strain dataset across the switching cycle, with roughly 100-nanometre spatial and 1-nanosecond temporal resolution.
The device had four transistor structures connected in parallel, a source-drain distance of 10 µm and a gate about 350 µm wide. It was hard-switched against a capacitive load with a 400 V drain supply, while the gate-source voltage toggled between 0 V and 4 V at 355 kHz and a 20% duty cycle.
What the two strain patterns may mean
The authors interpreted the compressive component as an inverse-piezoelectric response associated with changes in drain-source voltage. They interpreted the tensile component as localized Joule heating associated with drain current.
The paper’s discussion also summarized internal field gradients approaching −0.6 MV cm⁻¹ during 355 kHz operation.
At the drain-sided gate edge, the thermal component peaked at about +1.5 × 10⁻⁴ during turn-on, then was reported to disappear after 100 ns as the active region approached thermal equilibrium.
Where the model matched—and differed
A COMSOL finite-element model translated electric-field and temperature distributions from a TCAD simulation into the differential strain measured by the experiment.
The electrothermal model predicted a surface hotspot near the drain-side gate edge, with maximum heating of about 70 K. Its predicted heating fell below 30 K by the end of the on-state and disappeared during turn-off.
Measured and simulated strain profiles were reported to agree well in the thermally dominated gate section and to follow the same temporal trend in the drain region.
The off-state strain decreased linearly by about 0.015% over about 6 µm in both the experiment and simulation. During turn-on, however, the measured thermal-strain maximum was about 2 µm from the gate edge, while the simulation placed it directly underneath the edge.
The measured drain-region strain magnitude was about 20% weaker than the simulated value, which the authors considered within the spread of the coupling parameters.
A result with a narrow scope
The study describes one industrial HEMT under the tested capacitive hard-switching condition, and independent-device replication was not reported.
The experimental and simulated profiles used different cycle histories, and the paper attributed the resulting baseline shift to per-pulse global heating in the model.
DFXM directly measured integrated out-of-plane strain, while electric-field and temperature information was translated into strain through the coupled model.
Paper data and sources
Original title: Watching a GaN Transistor Switch: Real-Time Nanoscale Strain and Heat Dynamics
Authors: C. Corley-Wiciak, N. T. Sammler, B. Butej et al.
Journal/Repository: arXiv
Status: Preprint, not yet peer-reviewed
First online: 2026-08-26
DOI: Not available
Original paper · Full text